A high voltage SOI pLDMOS with a partial interface equipotential ...
Cross-section of the SOI high voltage device with a LDMOS structure ...
Figure 1 from A new high voltage SOI LDMOS with triple RESURF structure ...
Figure 1 from A 90 to 170V scalable P-LDMOS with accompanied high ...
A high-voltage SOI MOSFET with a compensation layer on the trenched ...
(PDF) A SOI LDMOS technology compatible with CMOS, BJT, and passive ...
(PDF) A new partial SOI-LDMOSFET with a modified buried oxide layer for ...
Figure 1 from 250 V Thin-Layer SOI Technology With Field pLDMOS for ...
Figure 1 from High voltage SOI CMOS IC technology for driving plasma ...
Figure 1 from A very low specific on-resistance high-voltage SOI ...
A novel SOI high-voltage SJ-pLDMOS based on self-adaptive charge balance
Figure 1 from Superjunction Power LDMOS on Partial SOI Platform ...
Figure 3 from ESD-Immunity Impact of HV pLDMOS with Drain-side Embedded ...
Figure 1 from Nonlinear Parasitic Capacitance Modelling of High Voltage ...
SOI high‐voltage LDMOS with novel triple‐layer top silicon based on ...
Analytical model for high-voltage SOI device with composite- k ...
An L-shaped low on-resistance current path SOI LDMOS with dielectric ...
Figure 3 from 300-V High-Side Thin-Layer-SOI Field pLDMOS With Multiple ...
Figure 1 from High voltage buried step-doping p+ layer silicon-on ...
Figure 4 - from An EKV-based high voltage MOSFET model with
Thin silicon layer SOI power device with linearly-distance fixed charge ...
High voltage SOI semiconductor device - Eureka | Patsnap
Experimental and theoretical study of an improved breakdown voltage SOI ...
Research and optimization of the ESD response characteristic in a ps ...
Partial SOI Platform Formation - Power Microelectronics. Device and ...
A Surface-Potential-Based Analytical I-V Model of Full-Depletion Single ...
Novel 700 V high-voltage SOI LDMOS structure with folded drift region
Figure 1 from Low On-Resistance SOI-LDMOS With Mobility-Enhancing ...
Numerical Investigation of Transient Breakdown Voltage Enhancement in ...
Figure 1 from Ultralow ON-Resistance High-Voltage p-Channel LDMOS With ...
Figure 1 from High-voltage power IC technology with nVDMOS, RESURF ...
Structure of SOI PMOS MOSFET device. ELECTRICAL CHARACTERISTICS OF ...
Advanced CMOS on Silicon-On-Insulator (SOI) Technology for High ...
(PDF) Stacked low-voltage PMOS for high-voltage ESD protection with ...
(PDF) Breakdown walkout and its reduction in high-voltage pLDMOS ...
Research for radiation-hardened high-voltage SOI LDMOS
Power Management SOI wafers | Okmetic
(PDF) Modelling of High-Voltage SOI-LDMOS Transistors including Self ...
Recent developments in superjunction power devices
LDMOS的技术和应用_word文档在线阅读与下载_无忧文档
Journal of Semiconductors
What Is Ldmos at George Amies blog
Review of the SiC LDMOS power device
Analog IC co-design for latch-up compliance - EDN Asia
3.3kV Diode Modules | element14 Philippines
